Transient Analysis of CMOS NAND gate

Transient analysis if a 2-input CMOS Nand gate is derived in the below pdf have a look at it .

 

Powered by PdfSR.com

Download Document

Read More

CMOS Buffer Using Two transistors

How to Analyse the Cmos Buffer With Two transistors

• This is one of the most prominent questions that is often asked in technical interviews of any electronics company.

• This circuit seems like it is very simple,but it if you start solving it it will lead to hell.

• In this post I will analyse this circuit and plot the VOUT vs VIN characteristics same as like the CMOS inverter.

I will give a few steps for users who are new.

• step1:

       Draw the Ids Vs vds Characteristics of PMOS.

• Step2:

       Draw the Ids Vs Vds charecteristics of NMOS.

• Step3:

       Overlap both the characteristics in a single plot.

• Step4:

       Find the Intersections Between the two plots for different values of Vgs.


These Values will give you the input and output values that are being satisfyied by the circuit.

As it is very tuff to say intutively that which transistor will On and which will off for which values of input because those conditions will include the output voltage,I use MATLAB to get these graphs and intersections.

The Matlab Code is given Below:

clc;
clear all;
close all; vdd=5; up=500; un=1500; cox=3.28e-6; wbyl=2; wbylp=6; vtn=0.5;
vtp=-0.5;
vin=0:0.1:5;
vout=0:0.01:5;
lengthofvin=length(vin); 
lengthofvout=length(vout);
for j=1:lengthofvin
for i=1:lengthofvout
if (vin(j)-vout(i)) < vtn currentn(j,i)=0;
end
if (vdd-vout(i))>(vin(j)-vout(i)-vtn)&& (vin(j)-vout(i))>=vtn
currentn(j,i)=0.5*un*cox*wbyl*((vin(j)-vout(i)-vtn).^2);
end
if (vdd-vout(i))<=(vin(j)-vout(i)-vtn )&& (vin(j)-vout(i))>=vtn
currentn(j,i)=un*cox*wbyl*(vin(j)-vout(i)-vtn-(vdd-vout(i))./2).*(vdd-vout(i));
end
end
end
for j=1:lengthofvin
for i=1:lengthofvout
if (vout(i)-vin(j)) < abs(vtp)
currentp(j,i)=0;
end
if (vout(i))>(vout(i)-vin(j)-abs(vtp))&& (vout(i)-vin(j))>=abs(vtp)
currentp(j,i)=0.5*up*cox*wbylp*((vout(i)-vin(j)-abs(vtp)).^2);
end
if (vout(i))<=(vout(i)-vin(j)-abs(vtp)) && (vout(i)-vin(j))>=abs(vtp)
currentp(j,i)=up*cox*wbylp*(vout(i)-vin(j)-abs(vtp)-((vout(i))./2))*(vout(i));
end
end
end
hold on; plot(vout,currentp','b');
xlabel('--------->vds'); 
ylabel('--------->ids');
title('Ids Vs Vds'); plot(vout,currentn','r'); hold off;
for j=1:lengthofvin
count=0;
for i=1:lengthofvout
if currentn(j,i)==currentp(j,i) 
newinput(1,j)=vin(j); 
if(vout(i)<=abs(vtp))
newoutput(1,j)=abs(vtp);
else if(vout(i)>=vdd-vtn)
newoutput(1,j)=vdd-vtn;
end newoutput(1,j)=vout(i); count=count+1;
if count==1 break;
end
end
end
end
end
for j=1:lengthofvin count=0;
for i=lengthofvout:-1:1
if currentn(j,i)==currentp(j,i)
newoutput1(j,1)=vout(i);
if(vout(i)>=vdd-vtn)
newoutput1(j,1)=vdd-vtn;
end 
count=count+1;
if count==1
break;
end
end
end
end
figure; hold on; 
plot(newinput,newoutput,'b',newinput,newoutput1,'b');
axis([0 5 0 5]);
xlabel('--------------->vin');
ylabel('--------------->vout'); 
title('Transfer Characteristics');

• The plot of the above MATLAB code will look something like give below:

                                           

                                                

                                     So in the graph you can see that the intersection of the PMOS and NMOS curves for a particular value of VGS are the input and output voltages that will satisfy this circuit conditions.And from the above plot it is clear that we can see a lot of intersections between the PMOS and NMOS curves .So let us consider the average value of voltage between the first point of intersection and the last point of intersection between the two PMOS and NMOS curves for a particular value of VGS. Then we will get the input versus output characteristics as shown below.But still we have a confusion because we took an average intersection point .

 

If we take the first intersection point ,then we will get the characteristics like shown below:

 

 

Read More

WaterFlow Model of CommonSource Amplifier

How Common Source Amplifier Works?? 

Have a look at the below video

 

Water Flow Model:
========================

1. Analogies used in the water flow model are as indicated

    Valve 1 as Vg1
    Valve 2 as Vg2
    Source Width as Width
 
2.For the existing waterflow system as shown the two valve's are used for controlling the water flow, similar to the biasing voltages of an Amplifier.

  Valve 1 is used for setting up the maximum distance the water can travel,which is similar to biasing the P MOS using VG1 with which Upper limit in output voltage is set.

3.Valve 2 is used to apply pressure on the waterflow which increases the distance with which water can travel.
Here the maximum distance is analogous to Overdrive voltage which is biased by making use Vg2 of N MOS.

4.Valve 2 is used to release pressure on the waterflow which decreases the distance with which water can travel.
Here the minimum distance is analogous to Overdrive voltage which is biased by making use Vg2 of N MOS.

5.Based on Minimum/Maximum distance travelled we can decide the Distance swing which is similar to the voltage swing.

6. Based on the source width variation we will have the water flow variation , which is analogous to the variation in  width ,which varies current ,which varies the Gm and inturn varies the  gain of the amplifier.

    There at the Input pipe we can see the water flow with its pressure variation which is anologous to the applying a varying input voltage

    The output is interms of travel distance variation of water ,which is analogous to the output voltage variations.

    

Read More